research-article

Workload-aware voltage regulator optimization for power efficient multi-core processors

Authors:

Abhishek A. Sinkar,

Hao Wang,

Nam Sung KimAuthors Info & Claims

DATE '12: Proceedings of the Conference on Design, Automation and Test in Europe

Pages 1134 - 1137

Published: 12 March 2012 Publication History

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Abstract

Modern multi-core processors use power management techniques such as dynamic voltage and frequency scaling (DVFS) and clock gating (CG) which cause the processor to operate in various performance and power states depending on runtime workload characteristics. A voltage regulator (VR), which is designed to provide power to the processor at its highest performance level, can significantly degrade in efficiency when the processor operates in the deep power saving states. In this paper, we propose VR optimization techniques to improve the energy efficiency of the processor + VR system by using the workload dependent P- and C-state residency of real processors. Our experimental results for static VR optimization show up to 19%, 20%, and 4% reduction in energy consumption for workstation, mobile and server multi-core processors. We also investigate the effect of dynamically changing VR parameters on the energy efficiency compared to the static optimization.

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Khatamifard SWang LYu WK�se SKarpuzcu U(2017)ThermoGaterACM SIGARCH Computer Architecture News10.1145/3140659.308025045:2(120-132)Online publication date: 24-Jun-2017
https://dl.acm.org/doi/10.1145/3140659.3080250
Khatamifard SWang LYu WK�se SKarpuzcu U(2017)ThermoGaterProceedings of the 44th Annual International Symposium on Computer Architecture10.1145/3079856.3080250(120-132)Online publication date: 24-Jun-2017
https://dl.acm.org/doi/10.1145/3079856.3080250
Li HWang XXu JWang ZMaeda RWang ZYang PDuong LWang Z(2017)Energy-Efficient Power Delivery System Paradigms for Many-Core ProcessorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.258405636:3(449-462)Online publication date: 1-Mar-2017
https://dl.acm.org/doi/10.1109/TCAD.2016.2584056
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Index Terms

Workload-aware voltage regulator optimization for power efficient multi-core processors
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
2. Hardware

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Published In

DATE '12: Proceedings of the Conference on Design, Automation and Test in Europe

March 2012

1690 pages

ISBN:9783981080186

General Chairs:
Wolfgang Rosenstiel
University of Tuebingen and edacentrum, DE
,
Enrico Macii
Politecnico di Torino, IT

Publisher

EDA Consortium

San Jose, CA, United States

Publication History

Published: 12 March 2012

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DATE '12

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EDAA
EDAC
SIGDA
The Russian Academy of Sciences

DATE '12: Design, Automation and Test in Europe

March 12 - 16, 2012

Dresden, Germany

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Khatamifard SWang LYu WK�se SKarpuzcu U(2017)ThermoGaterACM SIGARCH Computer Architecture News10.1145/3140659.308025045:2(120-132)Online publication date: 24-Jun-2017
https://dl.acm.org/doi/10.1145/3140659.3080250
Khatamifard SWang LYu WK�se SKarpuzcu U(2017)ThermoGaterProceedings of the 44th Annual International Symposium on Computer Architecture10.1145/3079856.3080250(120-132)Online publication date: 24-Jun-2017
https://dl.acm.org/doi/10.1145/3079856.3080250
Li HWang XXu JWang ZMaeda RWang ZYang PDuong LWang Z(2017)Energy-Efficient Power Delivery System Paradigms for Many-Core ProcessorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.258405636:3(449-462)Online publication date: 1-Mar-2017
https://dl.acm.org/doi/10.1109/TCAD.2016.2584056
Lee WWang YPedram MFettweis GNebel W(2014)VRConProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2617120(1-6)Online publication date: 24-Mar-2014
https://dl.acm.org/doi/10.5555/2616606.2617120
He XYan GHan YLi XFettweis GNebel W(2014)SuperRangeProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2616786(1-6)Online publication date: 24-Mar-2014
https://dl.acm.org/doi/10.5555/2616606.2616786
K�se SCavallaro JZhang TJones ALi H(2014)Regulator-gatingProceedings of the 24th edition of the great lakes symposium on VLSI10.1145/2591513.2591524(105-110)Online publication date: 20-May-2014
https://dl.acm.org/doi/10.1145/2591513.2591524
Zhang XTong TKanev SLee SWei GBrooks DChou PHuang RXie YKarnik T(2013)Characterizing and evaluating voltage noise in multi-core near-threshold processorsProceedings of the 2013 International Symposium on Low Power Electronics and Design10.5555/2648668.2648689(82-87)Online publication date: 4-Sep-2013
https://dl.acm.org/doi/10.5555/2648668.2648689

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Workload-adaptive process tuning strategy for power-efficient multi-core processors

Efficient traffic aware power management in multicore communications processors

Managing power constraints in a single-core scenario through power tokens

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Workload-adaptive process tuning strategy for power-efficient multi-core processors

Efficient traffic aware power management in multicore communications processors

Managing power constraints in a single-core scenario through power tokens

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