Abstract
Evolvable hardware (EHW) is hardware that can change its own circuit structure by genetic learning to achieve maximum adaptation to the environment. In conventional EHW, the learning is executed by software on a computer. However, there are problems associated with this method, of slow learning speeds and large systems, which are serious obstacles to utilizing EHW in various kinds of practical applications. To overcome these problems, we have developed a gate-level evolvable hardware chip, by integrating both GA hardware and reconfigurable hardware within a single LSI chip. The chip consists of genetic algorithm (GA) hardware, reconfigurable hardware logic, and the control logic. With this chip, we have successfully executed GA learning and hardware reconfiguration. In this paper, we describe the architecture, functions, and a performance evaluation of the chip. We show that its learning speed is considerably faster than with software.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Higuchi, T., Niwa, T., Tanaka, T., Iba, H., de Garis, H., Furuya, T.: Evolvable Hardware with Genetic Learning. Proc. Simulation of Adaptive Behavior, MIT Press (1993) 417–424
Higuchi, T., Iba, H., Manderick, B.: Evolvable Hardware. Massively Parallel Artificial Intelligence, MIT Press (1994) 398–421
Goldberg, D.: Genetic Algorithms in Search, Optimization, and Machine Learning. Addison Wesley (1989)
Kajitani, I., Hoshino, T., Nishikawa, D., Yokoi, H., Nakaya, S., Yamauchi, T., Inuo, T., Kajihara, N., Iwata, M., Keymeulen, D., Higuchi, T.: A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, Vol. 1478, Springer Verlag, Berlin (1998) 1–12
Kajitani, I., Hoshino, T., Kajihara, N., Iwata, M., Higuchi, T.: An Evolvable Hardware Chip and its Application as a Multi-Function Prosthetic Hand Controller. Proc. 16th National Conference on Artificial Intelligence (AAAI-99) (1999) 182–187
Kajitani, I., Sekita, I., Otsu, N., Higuchi, T.: Improvements to the Action Decision Rate for a Multi-Function Prosthetic Hand. Proc. 1st International Symposium on Measurement, Analysis and Modeling of Human Functions (2001) (in press)
Hortensius, P. D., et al.: Parallel Random Number Generation for VLSI Systems using Cellular Automata. IEEE Trans. Computers, Vol. 38, No. 10 (1989) 1466–1473
Thierens, D., Goldberg, D. E.: Elitist Recombination: an Integrated Selection Recombination GA. Proc. 1st IEEE Conference on Evolutionary Computation (1994) 508–512
Liu, Y., Iwata, M., Higuchi, T., Keymeulen, D.: An Integrated On-Line Learning System for Evolving Programmable Logic Array Controllers. Proc. Parallel Problem Solving from Nature (2000) 589–598
Debnath, D., Sasao, T.: Minimization of AND-OR-XOR Three-Level Networks with AND Gate Sharing. IEICE Trans. Information and Systems, Vol. E80-D, No 10 (1997) 1001–1008
Keymeulen, D., Iwata, M., Kuniyoshi, Y., Higuchi, T.: Online Evolution for a Self-Adaptive Robotic Navigation System using Evolvable Hardware. Artificial Life, Vol. 4 (1999) 359–393
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
� 2001 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Iwata, M., Kajitani, I., Liu, Y., Kajihara, N., Higuchi, T. (2001). Implementation of a Gate-Level Evolvable Hardware Chip. In: Liu, Y., Tanaka, K., Iwata, M., Higuchi, T., Yasunaga, M. (eds) Evolvable Systems: From Biology to Hardware. ICES 2001. Lecture Notes in Computer Science, vol 2210. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45443-8_4
Download citation
DOI: https://doi.org/10.1007/3-540-45443-8_4
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-42671-4
Online ISBN: 978-3-540-45443-4
eBook Packages: Springer Book Archive