We propose a word level, bounded model checking (BMC) algorithm based on translation
into the effectively propositional fragment (EPR) of first-order logic. This approach to BMC
allows for succinct representation of unrolled transition systems and facilitates reasoning at
a higher level of abstraction. We show that the proposed approach can be scaled to
industrial hardware model checking problems involving memories and bit-vectors. Another
contribution of this work is in generating challenging benchmarks for first-order theorem …

… Word level components have to be encoded bit-wise for SAT. … Word level components have
to be encoded bit-wise for SAT. … Word level components have to be encoded bit-wise for SAT. …