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Erdal Oruklu
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2020 – today
- 2024
- [j19]Yu Yuan, Kushal Virupakshappa, Erdal Oruklu:
Accelerating a Meta Learning Model for Ultrasonic Non-Destructive Testing Applications Using Model Compression and FPGA Hardware. J. Signal Process. Syst. 96(1): 15-29 (2024) - 2022
- [j18]Yu Yuan, Kushal Virupakshappa, Erdal Oruklu:
FPGA Implementation of an Ultrasonic Flaw Detection Algorithm Based on Convolutional Neural Networks. J. Signal Process. Syst. 94(12): 1447-1457 (2022) - [c40]Yu Yuan, Kushal Virupakshappa, Erdal Oruklu:
Hardware Efficient Implementation of an Ultrasonic Non-Destructive Evaluation Algorithm based on DeepLearning. MWSCAS 2022: 1-4 - 2021
- [j17]David Hentrich, Erdal Oruklu, Jafar Saniie:
Program diagramming and fundamental programming patterns for a polymorphic computing dataflow processor. J. Comput. Lang. 65: 101052 (2021) - 2020
- [c39]David Hentrich, Erdal Oruklu, Jafar Saniie:
Fine-Grained Instruction Placement in Polymorphic Computing Architectures. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [c38]Kushal Virupakshappa, Erdal Oruklu:
Investigation of Feature Inputs for Binary Classification of Ultrasonic NDT Signals using SVM and Neural Networks. MWSCAS 2019: 638-641 - [c37]Kangqi Chen, Erdal Oruklu:
Side-Channel Attack Resilient Design of a 10T SRAM Cell in 7nm FinFET Technology. MWSCAS 2019: 860-863 - [c36]Caterina Lazaro Martinez, Erdal Oruklu, Mudassir M. Rashid, Mert Sevil, Iman Hajizadeh, Ali Cinar, Jeremy R. Hajek:
From Design to Implementation - Algorithm Conversion and Transition to a Mobile Platform for an Artificial Pancreas. SIGITE 2019: 140 - 2018
- [j16]David Hentrich, Erdal Oruklu, Jafar Saniie:
A Dataflow Processor as the Basis of a Tiled Polymorphic Computing Architecture with Fine-Grain Instruction Migration. IEEE Trans. Parallel Distributed Syst. 29(10): 2164-2175 (2018) - [c35]Muyu Yang, Erdal Oruklu:
Full Adder Circuit Design Using Lateral Gate-All-Around (LGAA) FETs Based on BSIM-CMG Mode. MWSCAS 2018: 420-423 - 2017
- [j15]Caterina Lazaro Martinez, Erdal Oruklu, Mert Sevil, Kamuran Turksoy, Ali Cinar:
Hardware and Software Implementation of an Artificial Pancreas System on a Mobile Device. IJHCR 8(1): 14-28 (2017) - [c34]Yiyue Jiang, Kushal Virupakshappa, Erdal Oruklu:
FPGA implementation of a support vector machine classifier for Ultrasonic flaw detection. MWSCAS 2017: 180-183 - [c33]Yan Han, Erdal Oruklu:
Traffic sign recognition based on the NVIDIA Jetson TX1 embedded system using convolutional neural networks. MWSCAS 2017: 184-187 - [c32]Caterina Lazaro Martinez, Erdal Oruklu, Ali Cinar:
Security challenges and solutions for closed-loop artificial pancreas systems. MWSCAS 2017: 1097-1100 - 2016
- [c31]Yu Yuan, Erdal Oruklu:
Leakage reduction techniques for FinFET datapath circuits. EIT 2016: 638-641 - [c30]Caterina Lazaro Martinez, Erdal Oruklu, Mert Sevil, Kamuran Turksoy, Ali Cinar:
Implementation of an artificial pancreas system on a mobile device. EIT 2016: 642-647 - [c29]Caterina Lazaro Martinez, Erdal Oruklu, Mert Sevil, Kamuran Turksoy, Ali Cinar:
Communication challenges in a multi-sensor closed-loop artificial pancreas system. Wireless Health 2016: 117-121 - 2015
- [j14]Caterina Lazaro Martinez, Erdal Oruklu, Ali Cinar:
Cyber-Physical Platform Development for Multivariable Artificial Pancreas Systems. Int. J. Handheld Comput. Res. 6(3): 1-16 (2015) - [c28]Yan Han, Kushal Virupakshappa, Erdal Oruklu:
Robust traffic sign recognition with feature extraction and k-NN classification methods. EIT 2015: 484-488 - [c27]Kushal Virupakshappa, Yan Han, Erdal Oruklu:
Traffic sign recognition based on prevailing bag of visual words representation on feature descriptors. EIT 2015: 489-493 - [c26]Yu Yuan, Cecilia García Martin, Erdal Oruklu:
Standard cell library characterization for FinFET transistors using BSIM-CMG models. EIT 2015: 494-498 - [c25]Caterina Lazaro Martinez, Erdal Oruklu, Ali Cinar:
Sensor fusion and distributed platform development for artificial pancreas. EIT 2015: 592-597 - 2014
- [c24]Neelam Patil, Cecilia García Martin, Erdal Oruklu:
Performance evaluation of multi-gate fets using the BSIM-CMG model. EIT 2014: 256-259 - [c23]Cecilia García Martin, Erdal Oruklu:
Leakage power reduction in data driven dynamic logic circuits. EIT 2014: 260-263 - [c22]Yan Han, Erdal Oruklu:
Real-time traffic sign recognition based on Zynq FPGA and ARM SoCs. EIT 2014: 373-376 - [c21]Cecilia García Martin, Erdal Oruklu:
Performance evaluation of FinFET pass-transistor full adders with BSIM-CMG model. MWSCAS 2014: 917-920 - 2013
- [c20]Juan Lu, Erdal Oruklu, Jafar Saniie:
Improved time-frequency distribution using singular value decomposition of Choi-Williams distribution. EIT 2013: 1-4 - 2012
- [j13]Christophe Desmouliers, Erdal Oruklu, Semih Aslan, Jafar Saniie, Fernando Martinez-Vallina:
Image and video processing platform for field programmable gate arrays using a high-level synthesis. IET Comput. Digit. Tech. 6(6): 414-425 (2012) - [j12]Vijay Anand, Jafar Saniie, Erdal Oruklu:
Security Policy Management Process within Six Sigma Framework. J. Information Security 3(1): 49-58 (2012) - [j11]Erdal Oruklu, Xin Xiao, Jafar Saniie:
Reduced Memory and Low Power Architectures for CORDIC-based FFT Processors. J. Signal Process. Syst. 66(2): 129-134 (2012) - [j10]Erdal Oruklu, Joshua Weber, Jafar Saniie:
System-on-Chip Subband Decomposition Architectures for Ultrasonic Detection Applications. J. Signal Process. Syst. 68(3): 367-377 (2012) - [c19]Tom Chu, Jafar Saniie, Erdal Oruklu:
Acoustic sensor array for determination of undersea acoustic signatures. EIT 2012: 1-4 - [c18]Cecilia García Martin, Nicolas Bessou, Anne Chadoeuf, Erdal Oruklu:
Image processing design flow for virtual fitting room applications used in mobile devices. EIT 2012: 1-5 - [c17]Weidi Jia, Won-Jae Yi, Jafar Saniie, Erdal Oruklu:
3D image reconstruction and human body tracking using stereo vision and Kinect technology. EIT 2012: 1-4 - [c16]Semih Aslan, Erdal Oruklu, Jafar Saniie:
A high-level synthesis and verification tool for fixed to floating point conversion. MWSCAS 2012: 908-911 - [c15]Erdal Oruklu, Damien Pesty, Joana Neveux, Jean-Emmanuel Guebey:
Real-time traffic sign detection and recognition for in-car driver assistance systems. MWSCAS 2012: 976-979 - 2011
- [j9]Jeff Rebacz, Erdal Oruklu, Jafar Saniie:
Fast Signed-Digit Multi-operand Decimal Adders. Circuits Syst. 2(3): 225-236 (2011) - [j8]David Hentrich, Erdal Oruklu, Jafar Saniie:
Polymorphic Computing: Definition, Trends, and a New Agent-Based Architecture. Circuits Syst. 2(4): 358-364 (2011) - [j7]Christophe Desmouliers, Erdal Oruklu, Jafar Saniie:
Discrete wavelet transform realisation using run-time reconfiguration of field programmable gate array (FPGA)s. IET Circuits Devices Syst. 5(4): 321-328 (2011) - [j6]Vitaliy Kunin, Marcos Turqueti, Jafar Saniie, Erdal Oruklu:
Direction of Arrival Estimation and Localization Using Acoustic Sensor Arrays. J. Sens. Technol. 1(3): 71-80 (2011) - [j5]Joshua Weber, Erdal Oruklu, Jafar Saniie:
FPGA-Based Configurable Frequency-Diverse Ultrasonic Target-Detection System. IEEE Trans. Ind. Electron. 58(3): 871-879 (2011) - [c14]Vijay Anand, Jafar Saniie, Erdal Oruklu:
Trusted computing architectures for a mobile IT infrastructure. SIGUCCS 2011: 73-78 - 2010
- [j4]Vibhuti B. Dave, Erdal Oruklu, Jafar Saniie:
Constant addition with flagged binary adder architectures. Integr. 43(3): 258-267 (2010) - [c13]Xin Xiao, Erdal Oruklu, Jafar Saniie:
Reduced memory architecture for CORDIC-based FFT. ISCAS 2010: 2690-2693
2000 – 2009
- 2009
- [j3]Erdal Oruklu, Jafar Saniie:
Dynamically Reconfigurable Architecture Design for Ultrasonic Imaging. IEEE Trans. Instrum. Meas. 58(8): 2856-2866 (2009) - [c12]Semih Aslan, Erdal Oruklu, Jafar Saniie:
Realization of area efficient QR factorization using unified division, square root, and inverse square root hardware. EIT 2009: 245-250 - [c11]Jeff Rebacz, Erdal Oruklu, Jafar Saniie:
High performance signed-digit decimal adders. EIT 2009: 251-255 - [c10]Christophe Desmouliers, Erdal Oruklu, Jafar Saniie:
FPGA-based design of a high-performance and modular video processing platform. EIT 2009: 393-398 - [c9]Xin Xiao, Erdal Oruklu, Jafar Saniie:
Fast memory addressing scheme for radix-4 FFT implementation. EIT 2009: 437-440 - [c8]David Hentrich, Erdal Oruklu, Jafar Saniie:
Performance evaluation of SRAM cells in 22nm predictive CMOS technology. EIT 2009: 470-475 - 2008
- [j2]Yufeng Lu, Erdal Oruklu, Jafar Saniie:
Fast Chirplet Transform With FPGA-Based Implementation. IEEE Signal Process. Lett. 15: 577-580 (2008) - [j1]Xin Xiao, Erdal Oruklu, Jafar Saniie:
An Efficient FFT Engine With Reduced Addressing Logic. IEEE Trans. Circuits Syst. II Express Briefs 55-II(11): 1149-1153 (2008) - [c7]Yufeng Lu, Erdal Oruklu, Jafar Saniie:
Fpga-based hardware/software co-design for chirplet signal decomposition. ACM Great Lakes Symposium on VLSI 2008: 347-350 - [c6]Erdal Oruklu, Vibhuti B. Dave, Jafar Saniie:
Performance analysis of flagged prefix adders with logical effort. ISCAS 2008: 684-687 - [c5]Christophe Desmouliers, Erdal Oruklu, Jafar Saniie:
Universal Wavelet Kernel Implementation Using Reconfigurable Hardware. ReConFig 2008: 373-378 - 2007
- [c4]Vibhuti B. Dave, Erdal Oruklu, Jafar Saniie:
Design and Synthesis of a Three Input Flagged Prefix Adder. ISCAS 2007: 1081-1084 - [c3]John Moskal, Erdal Oruklu, Jafar Saniie:
Design and Synthesis of a Carry-Free Signed-Digit Decimal Adder. ISCAS 2007: 1089-1092 - 2005
- [c2]Erdal Oruklu, Guilherme Cardoso, Jafar Saniie:
Reconfigurable architecture for ultrasonic signal compression and target detection. ICASSP (5) 2005: 129-132 - 2004
- [c1]Erdal Oruklu, Jafar Saniie:
Multiplierless architectures for frequency-diverse target detection algorithms. Circuits, Signals, and Systems 2004: 404-409
Coauthor Index
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last updated on 2024-10-07 21:24 CEST by the dblp team
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