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Benoît Tain
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2020 – today
- 2023
- [j3]Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. IEEE J. Solid State Circuits 58(6): 1782-1797 (2023) - [i1]Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. CoRR abs/2304.13726 (2023) - 2022
- [j2]Nermine Ali, Jean-Marc Philippe, Benoît Tain, Philippe Coussy:
Generating Efficient FPGA-based CNN Accelerators from High-Level Descriptions. J. Signal Process. Syst. 94(10): 945-960 (2022) - 2021
- [c6]Nermine Ali, Jean-Marc Philippe, Benoît Tain, Philippe Coussy:
Exploration and Generation of Efficient FPGA-based Deep Neural Network Accelerators. SiPS 2021: 123-128 - 2020
- [c5]Nermine Ali, Jean-Marc Philippe, Benoît Tain, Thomas Peyret, Philippe Coussy:
Deep Neural Networks Characterization Framework for Efficient Implementation on Embedded Systems. SiPS 2020: 1-6 - [c4]Ivan Miro Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Anthony Quelen, Emmanuel Pluchart, Jean-Philippe Noel, Reda Boumchedda, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Alexandre Valentian, Frédéric Heitzmann, Edith Beigné, Fabien Clermidy:
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency. VLSI Circuits 2020: 1-2
2010 – 2019
- 2018
- [c3]Alexandre Carbon, Jean-Marc Philippe, Olivier Bichler, Renaud Schmit, Benoît Tain, David Briand, Nicolas Ventroux, Michel Paindavoine, Olivier Brousse:
PNeuro: A scalable energy-efficient programmable hardware accelerator for neural networks. DATE 2018: 1039-1044 - 2014
- [j1]Ivan Miro Panades, Edith Beigné, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Anca Molnos, Farhat Thabet, Benoît Tain, Karim Ben Chehida, Sylvain Engels, Robin Wilson, Didier Fuin:
A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC. IEEE J. Solid State Circuits 49(7): 1475-1486 (2014) - 2013
- [c2]Edith Beigné, Ivan Miro-Panades, Yvain Thonnart, Laurent Alacoque, Pascal Vivet, Suzanne Lesecq, Diego Puschini, Farhat Thabet, Benoît Tain, K. Benchehida, Sylvain Engels, Robin Wilson, Didier Fuin:
A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC. ESSCIRC 2013: 57-60 - 2010
- [c1]Jean-Marc Philippe, Benoît Tain, Christian Gamrat:
A Self-reconfigurable FPGA-Based Platform for Prototyping Future Pervasive Systems. ICES 2010: 262-273
Coauthor Index
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