In this paper, we systematically evaluate combinational logic families for CNT technology implementation for a variety of logic families, signal transition times, and transistor parameters. We compare CMOS static logic, transmission gate logic, and ...

Carbon Nanotube Field Effect Transistor (CNFET) has a potential to become successor of Si-CMOS devices because of its excellent electronic properties. One of the most important challenges for the CNT-based technology is the undesired presence of ...

In this paper, we propose for the first time the application of ambipolar CNTFETs with in-field controllable polarities to design regular fabrics with static logic. We exploit the high expressive power provided by complementary static logic built with ...

In this paper we explore the area overhead associated with the stochastic assembly of nanoscale logic. In nanoscale architectures, stochastically assembled nanowire decoders have been proposed as a way of addressing many individual nanowires using as ...

In the coming decade, CMOS technology is expected to approach its scaling limitations. Among the proposed nan-otechnologies, nanowires have the edge in the size of circuits and logic arrays that have already been fabricated and experimentally evaluated. ...

This paper presents a set of circuit design approaches to achieve clocked standard logic cell functions with ambipolar double-gate devices such as the Double Gate Carbon Nanotube FET (DG-CNTFET). The cells presented in this work use the infield ...

FinFETs are expected to supplant planar CMOS field-effect transistors (FETs) in the near future, owing to their superior electrical characteristics. From a circuit testing viewpoint, it is unclear if CMOS fault models are comprehensive enough to model ...

As modern computing systems become increasingly complex, communication efficiency among and inside chips has become as important as the computation speeds of individual processor cores. Traditionally, inter-chip and intra-chip communication ...

Nanomagnet Logic (NML) is a device architecture that utilizes the magnetization of nano-scale magnets to perform logical operations. NML has been experimentally demonstrated and operates at room temperature. Because the nanomagnets are non-volatile, as ...

We perform formal verification of quantum circuits by integrating several techniques specialized to particular classes of circuits. Our verification methodology is based on the new notion of a reversible miter that allows one to leverage existing ...

This paper presents a detailed analysis of an architectural pipeline scheme for Quantum-dot Cellular Automata (QCA); this scheme utilizes the so-called Bennett clocking for attaining high throughput and low power dissipation. In this arrangement, ...

This paper argues for alternate state variables and new types of sophisticated devices that implement more functionality in one computational step than typical devices based on simple switches. Elementary excitations in solids enabling wave interactions ...

In this work, we utilized memristors in the realization of power and area efficient programmable threshold gates. Memristors are used as weights at the inputs of the threshold gates. The threshold gates are programmed by changing the memristance to ...

A compact model and simulation methodology for chalcogenide based memristor devices is proposed. From a microprocessor design view point, it is important to be able to simulate large numbers of devices within the integrated circuit architecture in order ...