Abstract: A charge pump cell is used to make a voltage doubler using improved serial switches. A complete power efficiency theory is presented which fits ...
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A charge pump cell is used to make a voltage doubler using improved serial switches. The PMOS transistor used for the serial switch is analyzed.
A charge pump cell is used to make a voltage doubler using improved serial switches. A complete power efficiency theory is presented which fits the ...
A high-efficiency CMOS voltage doubler. from www.semanticscholar.org
A charge pump cell is used to make a voltage doubler using improved serial switches and the importance of capacitors is shown with plots of efficiency ...
This document summarizes a paper on improving the power efficiency of a CMOS voltage doubler circuit. It describes a new circuit design that uses two ...
This active voltage doubler provides considerably higher power conversion efficiency (PCE) and lower dropout voltage compared to its passive counterpart and ...
A high-efficiency CMOS voltage doubler. Favrat, P. ;; Deval, P. ;; Declercq, M. J.. Abstract. Publication: IEEE Journal of Solid-State Circuits.
A high-efficiency CMOS voltage doubler. from link.springer.com
Jul 23, 2020 · In this paper, a fully integrated six-phase voltage doubler (SPVD) is proposed. It consists of charge transfer switches and NMOS driver and PMOS ...
This paper presents a high-voltage output stage producing signals well beyond the voltage ratings of standard devices in a nanometer-scale CMOS technology. The�...