Deconfigurable microprocessor architectures for silicon debug acceleration
Abstract
References
Index Terms
- Deconfigurable microprocessor architectures for silicon debug acceleration
Recommendations
Accelerating microprocessor silicon validation by exposing ISA diversity
MICRO-44: Proceedings of the 44th Annual IEEE/ACM International Symposium on MicroarchitectureMicroprocessor design validation is a time consuming and costly task that tends to be a bottleneck in the release of new architectures. The validation step that detects the vast majority of design bugs is the one that stresses the silicon prototypes by ...
Deconfigurable microprocessor architectures for silicon debug acceleration
ISCA '13: Proceedings of the 40th Annual International Symposium on Computer ArchitectureThe share of silicon debug in the overall microprocessor chips development cycle is rapidly expanding due to the ever growing design complexity and the limited efficiency of pre-silicon validation methods. Massive application of short random test ...
First silicon functional validation and debug of multicore microprocessors
Microprocessor designs are increasingly moving towards multiple cores on a single die. Validating memory consistency, coherency, ordering, and atomicity is crucial. X86 microprocessors are prevalent at most levels of computing. Thus, new x86 ...
Comments
Information & Contributors
Information
Published In
Publisher
Association for Computing Machinery
New York, NY, United States
Publication History
Check for updates
Author Tags
Qualifiers
- Research-article
Funding Sources
- Greek national funds
- European Social Fund
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- View Citations5Total Citations
- 477Total Downloads
- Downloads (Last 12 months)5
- Downloads (Last 6 weeks)0
Other Metrics
Citations
View Options
Get Access
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in